Consolidated Question Bank - DIGITAL ELECTRONICS AND MICROPROCESSOR 8085 - 23BPH6E1

Digital Electronics and Microprocessor 8085

COURSE CODE : 23BPH6E1

Question Bank

[Questions which are marked with a ★ at the end are doubly important,

 marked with cyan color are important]

UNIT I – Number Systems & Logic Gates

Part A – Two Marks

1. Define Binary number system.

2. Define Octal number system.

3. Define Hexadecimal number system.

4. What is BCD code?

5. What is Gray code? Mention one use.

6. What is Excess-3 code?

7. Define code conversion.

8. What is 1’s complement?

9. What is 2’s complement?

10. Define 9’s complement.

11. Define 10’s complement.

12. What is binary addition?

13. What is binary subtraction?

14. State Boolean algebra laws.

15. State De Morgan’s theorems. ★

16. What are basic logic gates?

17. What are universal logic gates?

18. Define SOP representation.

19. Define POS representation.

20. What is Karnaugh Map?

21. Why NAND and NOR gates are called universal gates?★

Part B – Five Marks

1. Convert (101101) in binary to decimal.

2. Convert (347) in octal to binary.

3. Convert (9A) in hexadecimal to decimal.

4. Explain BCD code with an example.

5. Explain Gray code and its advantages.

6. Convert binary to Gray code - (10111010)

7. Convert Gray code to binary - (1110101101)

8. Perform binary subtraction using 1’s complement. 

     (11101101)-(11010101)

9. Perform binary subtraction using 2’s complement.

       (110101101)-(100010101)

10. State and Prove De Morgan’s theorem. ★

11. Explain NAND gate with truth table.

12. Explain NOR gate with truth table.

Part C – Ten Marks

1. Explain number systems and conversions with examples.

2. Discuss BCD, Gray and Excess-3 codes with suitable examples.

3. Explain complements and subtraction methods.

4. Prove De Morgan’s theorems using truth tables. ★

5. Describe how NAND and NOR gates can be used as universal gates. ★

6. Explain SOP and POS representation of logic functions.

7. Simplify Boolean functions using 3-variable K-map.

8. Simplify Boolean functions using 4-variable K-map. [Problem]

UNIT II – Combinational Circuits

Part A – Two Marks

1. Define Half Adder.

2. Define Full Adder.

3. Define Half Subtractor.

4. Define Full Subtractor.

5. What is Parallel Binary Adder?

6. Define Magnitude Comparator.

7. What is Multiplexer?

8. What is Demultiplexer?

9. Define Encoder.

10. Define Decoder.

11. What is 4:1 Multiplexer?

12. What is 1:4 Demultiplexer?

13. Define 8-to-3 Encoder.

14. Define 3-to-8 Decoder.

15. What is BCD to seven segment decoder?

Part B – Five Marks

1. Explain Half Adder with logic diagram and truth table.

2. Explain Full Adder with logic diagram and truth table.

3. Explain Half Subtractor with truth table.

4. Explain Full Subtractor with logic diagram.

5. Discuss the working of  Parallel Binary Adder.

6. Explain the function of Magnitude Comparator.

7. Explain 4:1 Multiplexer with truth table.

8. Explain 1:4 Demultiplexer with truth table.

9. Describe the working of 8-to-3 Encoder.

10. Describe the function of  3-to-8 Decoder with suitable diagrams.

11. Explain BCD to seven segment decoder.

Part C – Ten Marks

1. Explain Half Adder and Full Adder with diagrams and truth tables.

2. Explain the function of  Half Subtractor and Full Subtractor.

3. Explain 4-bit parallel binary adder.

4. Explain Magnitude Comparator with logic circuit.

5. Explain Multiplexer and Demultiplexer with applications.

6. Explain Encoder and Decoder with diagrams.

7. Describe the operation of BCD to seven segment decoder with neat diagram and  truth table ★

UNIT III – Sequential Circuits & Memory

Part A – Two Marks

1. Define Flip-Flop.

2. What is SR Flip-Flop?

3. What is JK Flip-Flop?

4. What is D Flip-Flop?

5. What is T Flip-Flop?

6. What is race around condition?

7. What is Master-Slave Flip-Flop?

8. Define Register.

9. Define SISO register.

10. Define PIPO register.

11. Define Counter.

12. Define MOD of counter.

13. Define Ring Counter.

14. What is ROM?

15. What is RAM?

Part B – Five Marks

1. Explain SR Flip-Flop with truth table and logic diagram.

2. Explain JK Flip-Flop with truth table and logic diagram. ★

3. Explain D Flip-Flop with truth table and logic diagram.

4. Explain T Flip-Flop with logic diagram.

5. Explain Master-Slave Flip-Flop with a suitable diagram and truth table. ★

6. Explain Serial In Serial Out register.

7. Explain Parallel In Parallel Out register.

8. Explain MOD-8 asynchronous counter.

9. Explain MOD-10 counter.

10. Explain Ring counter. ★

11. Explain Static RAM and Dynamic RAM.

12. Explain ROM, PROM and EPROM.

Part C – Ten Marks

1. Explain different types of flip-flops with truth tables.

2. Explain registers and shift registers.

3. Explain asynchronous counters with examples.

4. Explain synchronous counters.

5. Explain ring counter operation with state diagram. 

6. Explain ROM, RAM and memory organization.

7. Explain EPROM, EEPROM and EAROM.

8. Explain RTL, DTL, TTL and CMOS logic families.

9. Explain CMOS NAND and NOR gates.

10. Explain Programmable Logic Devices (PLA and PAL).

UNIT IV – 8085 Microprocessor

Part A – Two Marks

1. Define Microprocessor.

2. What is 8085 microprocessor?

3. Define ALU.

4. What is an Accumulator?

5. What is Program Counter?

6. What is Stack Pointer?

7. Define PSW.

8. List 8085 flags.

9. Define interrupt.

10. List 8085 interrupts.

11. What addressing modes?

Part B – Five Marks

1. Describe the the architecture of 8085 with a neat diagram.★

2. Explain register organization.

3. Explain pin configuration of 8085 microprocessor IC with a diagram.

4. Explain PSW.

5. Explain interrupts and priority.

6. Explain various addressing modes of 8085 microprocessor.

7. Explain instruction set classification.

8. Write a program for 8-bit addition.

9. Write a program for 16-bit addition.

10. Write a program for 8-bit subtraction.

11. Write a program for multiplication of two 8 bit numbers

12. Write a program for division of two 8 bit numbers.

Part C – Ten Marks

1. Explain architecture of 8085 with diagram. ★

2. Explain the pin configuration of 8085 with a neat figure. ★

3. Explain instruction set classification.

4. Write program for 16-bit subtraction.

5. Write program to find largest number in array.

6. Write program to find smallest number in array.

7. Write program for BCD to ASCII conversion.

8. Write program for ASCII to BCD conversion.

UNIT V – I/O Interfaces

Part A – Two Marks

1. Define I/O interface.

2. What is 8251 USART?

3. Define serial communication.

4. Define parallel communication.

5. What is 8255 PPI?

6. What is 8253 timer?

7. What is 8279 keyboard controller?

8. What is DMA?

9. What is 8237 DMA controller?

Part B – Five Marks

1. Explain 8251 USART with neat diagrams.

2. Explain architecture of 8255.

3. Explain 8255 modes of operation.

4. Explain 8253 programmable timer.

5. Explain 8279 keyboard display controller.

6. Explain DMA transfer process.

Part C – Ten Marks

1. Explain architecture and operation of 8251 USART.

2. Explain architecture and modes of 8255 PPI.

3. Explain 8253 programmable interval timer.

4. Explain 8279 keyboard display controller.

5. Explain 8237 DMA controller.

6. Explain interfacing of 8255 with 8085.

Programmable Logic Array

Student Assignment on Our Department's Industrial Visit to Sothupparai Dam and Vaigai Dam - August 26, 2025. Zoom, Pan, Center and Scroll For Best Experience in Mobile Devices

Visit to Sothupparai Dam and Vaigai Dam

A field visit report on two important gravity dams of Tamil Nadu

Sothupparai Dam

Sothupparai Dam is a gravity dam built across the Varaha River in the foothills of the Western Ghats, near Periyakulam in the Theni district of Tamil Nadu. The dam is mainly fed by rainfall from the Western Ghats and runoff from Berijam Lake near Kodaikanal.

Important Facts

• Location: Near Periyakulam, Theni district
• River: Varaha River (a tributary of the Vaigai River)
• Water Source: Western Ghats rainfall and Berijam Lake catchment

Path to the Upper Reaches

While going to Sothupparai Dam, we climbed the mountain and enjoyed the scenic surroundings. The path was narrow and sloping like a cattle path, with bright sunlight and many steep steps.

Water Regulation

Water release from the dam varies daily depending on inflow and reservoir level. During the rainy season, excess water is released through spillways to prevent overflow. In dry periods, water is released mainly for drinking and essential needs.

Tunnel and Monitoring

The dam contains inspection tunnels and seepage outlets. Water entering through these outlets is carefully monitored for both quantity and quality before controlled release.

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Vaigai Dam

Vaigai Dam is a gravity dam built across the Vaigai River near Andipatti in Theni district. Construction began in 1954 and the dam was completed and inaugurated in 1964 by the former Chief Minister of Tamil Nadu, K. Kamaraj.

The dam plays a vital role in supplying water for irrigation, drinking, and other needs in the Madurai and Dindigul districts.

Water Level and Capacity

• Type: Gravity Dam
• Total height: 111 feet
• Full Reservoir Level: 71 feet
• Storage capacity: 6,143 million cubic feet

Official updates on water level, inflow, and discharge are regularly provided by the Water Resources Department of Tamil Nadu.

Guarded Area and View Point

Certain sections of the dam, including tunnels, fall gates, and upper hill areas, are restricted to authorized personnel. From the viewpoint, the surrounding landscape offers a beautiful panoramic view.

High-voltage electrical equipment (440 volts) is installed in this area, with protective barriers and measuring instruments to ensure safety and monitoring.

Electricity Generation

• Power station: Tamil Nadu Electricity Board
• Installed capacity: 6 MW (2 × 3 MW units)
• Commissioned: January 29, 1959
• Recommissioned: April 3, 1990

The Vaigai Hydroelectric Power Plant operates using a 71-foot water head. About 700 cubic feet of water per second is released to generate electricity.

On average, 2.45 lakh units of electricity are generated per day. Around 21 million units were generated between June and October, compared to 18 million units in the previous year.

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This visit helped us understand dam engineering, water management, and hydroelectric power generation in real-world conditions.

Syllabus : DIGITAL ELECTRONICS AND MICROPROCESSOR 8085 - VI SEMESTER - COURSE CODE : 23BPH6E1

UNIT - I

Decimal, binary, octal, hexadecimal numbers systems and their conversions – codes: BCD, gray and excess-3 codes – code conversions – complements (1’s, 2’s, 9’s and 10’s) – binary addition, binary subtraction using 1’s and 2’s complement methods – Boolean laws – De-Morgan’s theorem –basic logic gates - universal logic gates (NAND and NOR) – standard representation of logic functions (SOP and POS) – minimization techniques (Karnaughmap: 2, 3, 4 variables)

UNIT - II

Adders, half and full adder – subtractors, half and full subtractor – parallel binary adder – magnitude comparator – multiplexers (4:1) and demultiplexers (1:4), encoder (8-line-to-3- line) and decoder (3-line-to- 8-line), BCD to seven segment decoder.

UNIT - III

Flip-flops: S-R Flip-flop , J-K Flip-flop, T and D type flip-flops, master-slave flip-flop, truth tables, registers:- serial in serial out and parallel in and parallel out – counters asynchronous:-mod-8, mod-10, synchronous - 4-bit and ring counter – general memory operations, ROM, RAM (static and dynamic), PROM, EPROM, EEPROM, EAROM. IC – logic families: RTL, DTL, TTL logic, CMOS NAND and NOR Gates, CMOS Inverter, Programmable Logic Devices – Programmable Logic Array (PLA), Programmable Array Logic (PAL).

UNIT - IV

8085 Microprocessor: Introduction to microprocessor – INTEL 8085 architecture – register organization –pin configuration of 8085, interrupts and its priority – Program Status Word (PSW) –instruction set of 8085 –addressing modes of 8085 –assembly language programming using 8085 –programmes for addition (8-Bit and 16-Bit), subtraction (8-Bit and 16-Bit), multiplication (8- Bit), division (8- Bit) – largest and smallest number in an array – BCD to ASCII and ASCII to BCD.

UNIT - V

I/O Interfaces: Serial communication interface (8251-USART) – programmable peripheral interface (8255-PPI) –programmable interval timers (8253) – keyboard and display (8279), DMA controller (8237).

UNIT - VI PROFESSIONAL COMPONENTS

Expert Lectures - Seminars - Webinars - Industry Inputs - Social Accountability - Patriotism

TEXT AND REFERENCE BOOKS

Text Books
1. M.Morris Mano, “Digital Design “3rd Edition, PHI, NewDelhi.
2. Ronald J. Tocci. “Digital Systems-Principles and Applications” 6/e. PHI. New Delhi. 1999.(UNITS I to IV )
3. S.Salivahanaand S. Arivazhagan-Digital circuits and design
4. Microprocessor Architecture, Programming and Applications with the 8085 – Penram International Publishing, Mumbai.- Ramesh S.Gaonakar
5. Microcomputer Systems the 8086/8088 family – YU-Cheng Liu and GlenSA
Reference Books
1. Herbert Taub and Donald Schilling. “Digital Integrated Electronics” . McGraw Hill. 1985.
2. S.K. Bose. “Digital Systems”. 2/e. New Age International.1992.
3. D.K. Anvekar and B.S. Sonade. “Electronic Data Converters: Fundamentals andApplications”. TMH.1994.
4. Malvino and Leach. “Digital Principles and Applications”. TMG HillEdition
5. Microprocessors and Interfacing – Douglas V.Hall.
6. Microprocessor and Digital Systems – Douglas V.Hall

WEB RESOURCES

1. Introduction to Registers
2. 3 Bit Asynchronous Up Counter

Wave Table Simulation - Interference of Multiple Sources

Wave Table — Interactive

Interference pattern from coherent point sources. Nodal lines are rendered in-shader for visualization.

Amplitude1.00

Wavelength (λ)0.050

Speed1.00

Damping0.10

Sources2

Source Seperation0.080

Color Saturation0.25

Lines

Line Width0.020

Drag mouse: move floating source

Press Space to toggle animation

-- FPS

Nuclear Shell Model - Concise Notes

 

Semi Empirical Mass Formula - Liquid Drop Model of the Nucleus

SEMF

Semi-Empirical Mass Formula [Bethe-Weizsäcker Formula]

Derivation and Explanation

Statement:

The Semi‑Empirical Mass Formula (SEMF) gives the nuclear binding energy \(B(A,Z)\) of a nucleus with mass number \(A\) and atomic number \(Z\) as the sum of five macroscopic terms derived from the liquid‑drop model:

Formula :

\[B(A,Z)=a_V A - a_S A^{2/3} - a_C \frac{Z(Z-1)}{A^{1/3}} - a_A \frac{(A-2Z)^2}{A} + \delta(A,Z)\]

Sometimes the Coulomb term is written as \(a_C \dfrac{Z^2}{A^{1/3}}\) and the pairing term \(\delta\) has the usual form given below.

Derivation: Physical origin of each term :



Volume term \(a_V A\) :

The nucleus behaves like an incompressible liquid drop. Each nucleon binds with a roughly constant number of nearest neighbours, so binding energy is proportional to \(A\). Hence \(a_V A\) with \(a_V>0\).

Surface term \(-a_S A^{2/3}\) :

Nucleons at the surface have fewer neighbours and so contribute less binding. Surface area scales as \(A^{2/3}\), giving a negative correction \(-a_S A^{2/3}\).

Coulomb term \(-a_C Z(Z-1)/A^{1/3}\) :

Protons repel by Coulomb force. Approximating the nucleus as a uniformly charged sphere of radius \(R\propto A^{1/3}\) leads to electrostatic energy \(\propto Z^2/R \sim Z^2/A^{1/3}\). The factor \(Z(Z-1)\) corrects for self‑interaction.

Asymmetry (or Pauli) term \(-a_A (A-2Z)^2/A\) :

Quantum mechanically, neutrons and protons fill Fermi levels. Minimum energy occurs when \(N\approx Z\) for small nuclei. Deviation from symmetric \(N=Z\) costs kinetic (Fermi) energy, producing a term quadratic in \(N-Z\): since \(N=A-Z\), this becomes \((A-2Z)^2/A\).

Pairing term \(\delta(A,Z)\) :

Because of pairing, nuclei with even numbers of protons and neutrons are extra stable. Empirical form: \[\delta(A,Z)=\begin{cases} +a_P A^{-1/2} & \text{even-}Z,\,\text{even-}N\\ -a_P A^{-1/2} & \text{odd-}Z,\,\text{odd-}N\\ 0 & \text{if } A \text{ is odd}\end{cases}\] This term is small and alternates sign depending on nucleon parity.

Notes on coefficients and units :

Typical fitted values(approximately): \(a_V = 15.5 \, MeV\)

\(a_S = 17.0 \, MeV\)

\(a_C = 0.71 \, MeV\)

\(a_A = 23.0 \, MeV\)

\(a_P = 11.0 \, MeV\)

These are empirical — obtained by fitting measured nuclear masses.

Short derivation sketch for asymmetry term :

Treat protons and neutrons as independent Fermi gases. Fermi energy scales as \(E_F\propto (n)^{2/3}\) where density \(n\) differs when \(N\ne Z\). Expanding the total kinetic energy to second order in the neutron excess gives an energy contribution \(\propto (N-Z)^2/A\), producing the asymmetry term shown above.

Example / application & remarks :

Binding energy per nucleon \(B/A\) predicted by SEMF peaks near \(A\sim 56\), explaining iron‑group stability and why heavy nuclei fission while light nuclei fuse. SEMF also predicts approximate mass parabolae and decay energetics (Q‑values) qualitatively well.

Anomalous Zeeman Effect and Paschen-Back Effect

Anomalous Zeeman Effect

Definition:

The Anomalous Zeeman Effect is the splitting of spectral lines into more than three components when an atom is placed in an external magnetic field, typically observed in atoms having unpaired electron spin and non-zero total angular momentum.

Explanation :

1. In the normal Zeeman effect only orbital angular momentum is considered and energy levels split into three (a triplet) because of simple magnetic interaction.
2. Most atoms, however, have both orbital L and spin S angular momenta which couple to give total angular momentum J. The interaction with the magnetic field depends on the Landé g-factor (g_J), not just on orbital motion.
3. Each atomic level splits into (2J + 1) magnetic sublevels labelled by m_J, producing multiple components in the observed spectral lines. Selection rules (Δm_J = 0, ±1) determine which transitions are allowed, giving a complex pattern of π and σ lines.
4. The anomalous effect thus reveals the role of electron spin and the vector coupling of L and S, and was historically important evidence for the existence of electron spin and for quantum theory.

Key formula:

\[\Delta E = \mu_B\, g_J\, B\, m_J\]

where \(\mu_B\) is the Bohr magneton, \(B\) is the magnetic field, \(g_J\) is the Landé g-factor, and \(m_J\) is the magnetic quantum number.

Paschen Back Effect :

In very strong magnetic fields, the coupling between orbital angular momentum \(L\) and spin \(S\) breaks down. The magnetic interaction becomes dominant compared to spin orbit coupling, causing \(L\) and \(S\) to align independently with the field. This leads to a simpler splitting pattern than the anomalous Zeeman effect, similar to the normal Zeeman effect.

This occurs When magnetic energy \(\mu_B B\) is much greater than spin orbit interaction energy.