Notes for IV and V Unit - Left out in the Material
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CD - LASER RW Systems
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CD
– LASER RW Systems
CD stands for Compact Disk and denotes an optical storage medium
used to store video, audio and data. CD-ROM disks can be written once and only
read thereafter. CD ROM drive uses LASER technology to read data from it. A semiconductor LASER generates a high
intensity light wave of stable wavelength = 780 nm. A lens system is used to direct
the LASER towards the disk over approximately 1 micron diameter spot as shown
in the figure.
The intensity of the reflected light from metallic reflection
layer, received by photo sensors gives the information of binary data stored in
CD. There are two different surfaces called land and bit from which reflection
occurs. The pit is approximately 0.12 micron deep compared to land and
reflected intensities are about 25 % and more than 70 % respectively (Figure
b).
Every time laser beam travels from land to pit or pit to land
there is a change in intensity of reflected light. This change is read as binary digit 1 and a
constant intensity reflected light is interpreted as 0. The pit width is such
that there is at least 2 and at most 10 zeroes between every 1. This is achieved by converting every 8-bit
byte into a 14-bit value, a process called Eight to Fourteen Modulation (EFM). Such arrangements make it easy for the read
laser to detect bits and synchronization. Data corresponding to a small portion
of the track is shown above label in Figure a.
CD-RW
CD-RW or CD-Read Write gives user facility to write and erase
data many times. CD-RW uses an active layer of Ag-In-Sb-Te alloy that has a
poly crystalline structure making it reflective (reflectivity 25 %). Writing data
on disk uses highest power of laser that heats up selected spots to 500°C –
700°C. At this temperature the chemical
structure liquefies losing its polycrystalline structure and on cooling solidifies
to an amorphous state that has reduced reflectivity of 15 %. The reading
process is like CD-ROM and CD-R that notes the differences in reflectivity of
the storage surface.
To reverse the phase or erase data, the laser operates at a
lower power setting and heats the active material to nearly 200°C. This reverses
the material from its amorphous to its polycrystalline state and then becomes
reflective again. This is illustrated in
the following figure.
Flash Memory Notes
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Flash Memory (Memory Stick)
Flash memory storage is a form of
non-volatile memory that was born out of a combination of the traditional EPROM
and E2PROM.
In essence it uses the same
method of programming as the standard EPROM and the erasure method of the E2PROM.
One of the main advantages that
flash memory has when compared to EPROM is its ability to be erased
electrically. However it is not possible to erase each cell in a flash memory
individually unless a large amount of additional circuitry is added into the chip.
This would add significantly to the cost and accordingly most manufacturers
dropped this approach in favor of a system whereby the whole chip, or a large
part of it is block or flash erased.
Today most flash memory chips
have selective erasure, allowing parts or sectors of the flash memory to be
erased. However any erasure still means that a significant section of the chip
has to be erased.
Flash memory is able to provide
high density memory because it requires only a few components to make up each
memory cell. In Each Flash memory cell consists of the basic channel with the
source and drain electrodes separated by the channel about 1 µm long. Above the
channel in the Flash memory cell there is a floating gate which is separated
from the channel by an exceedingly thin oxide layer which is typically only 100
Å thick. It is the quality of this layer which is crucial to the reliable
operation of the memory.
Above
the floating gate there is the control gate. This is used to charge up the gate
capacitance during the write cycle.
The Flash memory cell functions
by storing charge on the floating gate. The presence of charge will then
determine whether the channel will conduct or not. During the read cycle a
"1" at the output corresponds to the channel being in its low
resistance or ON state.
Programming
Flash memory
Programming the Flash memory cell
involves a process known as hot-electron injection. When programming the
control gate is connected to a "programming voltage". The drain will
then see a voltage of around half this value while the source is at ground. The
voltage on the control gate is coupled to the floating gate through the
dielectric, raising the floating gate to the programming voltage and inverting
the channel underneath. This results in the channel electrons having a higher drift
velocity and increased kinetic energy.
Collisions between the energetic
electrons and the crystal lattice dissipate heat which raises the temperature
of the silicon. At the programming voltage it is found that the electrons
cannot transfer their kinetic energy to the surrounding atoms fast enough and
they become "hotter" and scatter further afield, many towards the
oxide layer. These electrons overcome the 3.1 eV (electron volts) needed to
overcome the barrier and they accumulate on the floating gate. As there is no
way of escape they remain there until they are removed by an erase cycle.
The erase cycle for Flash memory
uses a process called Fowler-Nordheim tunneling. The process is initiated by
routing the programming voltage to the source, grounding the control gate and
leaving the drain floating. In this condition electrons are attracted towards
the source and they tunnel off the floating gate, passing through the thin
oxide layer. This leaves the floating gate devoid of charge.
Generally the erase process is
only made to last a few milliseconds. When complete each Flash memory cell in
the block is checked to ensure it has been completely erased. If not a second
erase cycle is initiated.
Flash
memory access
Flash memory is different to most
other types of electronic memory in that while reading data can be performed on
individual addresses on certain types of flash memory, erase and write
activities may only be performed on a block of a Flash memory. A typical block
size will be 64, 128, or 256 kB. In order to accommodate this, the low level
control software used to drive Flash memories, needs to take account of this if
the read and write operations are to be performed correctly.
Flash memory technology is able
to provide a very high density form of memory.
Flash
Memory Advantages
- Non-volatile memory
- Easily portable (e.g. USB memory sticks, camera flash cards, etc)
- Mechanically robust
Flash
Memory Disadvantages
- Higher cost per bit than hard drives
- Slower than other forms of memory
- Limited number of write / erase cycles
- Data must be erased before new data can be written
- Data typically erased and written in blocks
ADC – Simultaneous Conversion
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Simultaneous/Flash ADC is based on using a number of
comparators to simultaneously compare the analog voltage to be converted with a
set of predefined reference voltage levels and the process of such comparison
happens simultaneously. The number of comparators required for making an n-bit simultaneous
converter is given by 2n .
As an example consider a 2-bit simultaneous ADC. A schematic diagram
of such a system is shown below.
The analog signal to be digitized serves as one of the inputs
to each of the comparators. The second input for each of the comparators is a
reference input, different for each comparator. The reference voltages to be
used for comparators are in general V/2n, 2V/2n, 3V/2n,
4V/2n and so on. Here, V is the maximum amplitude of the
analogue signal that the A/D converter can digitize, and n is the number of
bits in the digitized output.
In the present case of a two-bit A/D converter, the reference
voltages for the three comparators will be V/4, V/2 and 3V/4. If we wanted a
three-bit output, the reference voltages would have been V/8, V/4, 3V/8, V/2,
5V/8, 3V/4 and 7V/8. As we see from above diagram that the output status of
various comparators depends upon the input analogue signal VA. For
instance, when the input VA lies between V/4 and V/2, the C1
output is HIGH whereas the C2 and C3 outputs are both
LOW. The possible results are shown in the table below.
The outputs of the comparators can then be fed to a coding
network to provide two bits that are digital equivalent of the input analog
voltage. The bits at the output of the coding network can then be entered into
a flip-flop register for storage.
One of the biggest disadvantages of a simultaneous ADC is
that, as the number of bits in the desired digital signal increases, the number
of comparators required for performing A/D conversion increases very rapidly,
and it may not be feasible to use this approach once the number of bits exceeds
six or so. The greatest advantage of this technique lies in its capability to
execute extremely fast analogue-to-digital conversion.
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