How Bubble Memory Works - Link
Click HERE to see animations from Wiki Media to Understand How Bubble Memory Works
Charge Coupled Devices - CCD
Click HERE to download as a PDF
CCD Operation
A Charge Coupled Device (CCD) is
a highly sensitive photon detector. The CCD is divided up into a large number
of light-sensitive small areas (known as pixels) which can be used to build up
an image of a scene. A photon of light which falls within the area defined by
one of the pixels will be converted into one (or more) electrons and the number
of electrons collected will be directly proportional to the intensity of the
scene at each pixel. When the CCD is clocked out, the number of electrons in
each pixel is measured and the scene can be reconstructed.
The figure below shows a
simplified cross section through a CCD. The pixels are defined by the position
of electrodes above the CCD. If a positive voltage is applied to the electrode,
then this positive potential will attract all of the negatively charged
electrons close to the area under the electrode. In addition, any positively
charged holes will be repulsed from the area around the electrode. Consequently
a potential well will form in which the electrons produced by the incoming
photons will be stored.
As more and more light falls
onto the CCD, then the potential well surrounding this electrode will attract
more and more electrons until the potential well is full. To prevent this
happening the light must be prevented from falling onto the CCD for example, by
using a shutter as in a camera. Thus, an image can be made of an object by
opening the shutter, "integrating" for a length of time to fill up
most of the electrons in the potential well, and then closing the shutter to
ensure that the full well capacity is not exceeded.
An actual CCD will consist of a large number
of pixels (i.e., potential wells), arranged horizontally in rows and vertically
in columns. The number of rows and columns defines the CCD size, typical sizes
are 1024 pixels high by 1024 pixels wide. The resolution of the CCD is defined
by the size of the pixels, also by their separation (the pixel pitch).
CCD Operation
The figure below shows a cross
section through a row of a CCD. Each pixel consists of three electrodes IØ1,
IØ2, and IØ3. Only one of these electrodes is required to create the potential
well, but other electrodes are required to transfer the charge out of the CCD.
The upper section of the figure (section 1) shows charge being collected under
one of the electrodes. To transfer the charge out of the CCD, a new potential
well can be created by holding IØ3 high, the charge is now shared between IØ2
and IØ3 (section 2). If IØ2 is now taken low, the charge will be fully
transferred under electrode IØ3 (section 3). To continue clocking out the CCD,
taking IØ1 high and then taking IØ3 low will ensure that the charge cloud now
drifts across under the IØ1 electrodes. As this process is continued, the
charge cloud will progress either down the column, or across the row, depending
upon the orientation of the electrodes.
The figure below (clocking diagram) shows the progression under which each electrode is held high
and low to ensure that charge is transferred through the CCD.
Initially, IØ2 is high - usually
to around 12V, and the charge is held under that electrode as in (1)
previously. When IØ3 is held high, and IØ2 is taken low (usually 0 V), the
charge migrates under the IØ3 electrode (as in (2)). Finally, taking IØ1 high
and IØ3 low transfers the charge under IØ1 (as in (3)). This process is
repeated in transfer 2 and transfer 3, the charge has now been moved three
pixels along. This process is known as charge coupling (hence CCD).
For most of the CCD, the
electrodes in each pixel are arranged so that the charge is transferred
downwards along the columns. Hence, during the CCD clocking operation, rows are
transferred downwards to the final row (the readout register) which is used to
transfer the charge in each pixel out of the CCD so it can be measured.
In the read out register, the
electrodes are arranged so that the charge is transferred in the horizontal
direction, along the readout register.
The final process on the CCD is
the reading of each pixel so that the size of the associated charge cloud can
be measured. At the end of the readout register is an amplifier which measures
the value of each charge cloud and converts it into a voltage.
MOS Dynamic RAM Cell
Click HERE to download as PDF
Memory cells of a dynamic RAM memory consist of capacitor
storing electric charges hence logic voltage levels. A bit cell
constitutes a transistor with a capacitor interconnected to the line that
selects a memory row and to the bit line in the word (bit read and write
lines). The figure below shows such a bit cell based on a MOS FET.
A write takes place as
a result of row line selection (positive voltage) and insertion through a bit
line of the voltage that corresponds to the stored bit: 0 V for logical zero
and the positive voltage for one. For logical one, the capacitor will charge
through the conducting transistor to the positive voltage. For zero, the
transistor will be turned off and the condenser will discharge if loaded or it
will remain not charged (in both cases the condenser plate at the transistor
side will reach 0V potential).
On read, a row line will be set to the positive potential and
the transistor will be turned on. If the condenser was charged (the bit cell
was storing one), the positive voltage from the condenser plate will be
transferred into the bit line (readout of one) after which the capacitor
discharges through the bit line. If the capacitor was not charged, 0 V will be
transferred to the bit line i.e. a logical zero, stored in this cell. After
readout of a bit cell, the condenser has to be charged again to restore the
previous contents of the memory cell. It is done by execution of the read cycle
for the same information. A data-readout from dynamic RAM memory is destructive
and in this memory a read cycle is always followed by a write cycle.
A semiconductor dynamic RAM memory is a volatile memory,
since charged capacitors are subject to spontaneous discharging. The reason for
this is the leakage that results from impurities in the crystalline structure
of silicon. Therefore, dynamic RAM memory requires periodic refreshing of
stored data. This is done by special refresh circuits, which are always added
as an extension of the proper data storing circuitry.
Atomic and Nuclear Physics - University Model Test - 7BPH4C1
Department of Physics - Dr.Zakir Husain College, Ilayangudi.
Atomic And Nuclear Physics –4BPH4C1
Time: 3 Hours Max Marks: 75
Part – A (10 x 2 = 20)
Answer All the Questions
2. Write note on photoelectric cell.
3. Give Pauli’s exclusion principle.
4. Define Bohr Magneton.
5. State Mosley’s Law.
6. What is a unit cell?
7. What are the limitations of cyclotron?
8. Define Half Life.
9. Write note on Van Allen Belts.
10.What are Baryons?
Part – B (5 x 5 = 25)
Answer All the Questions
11. Discuss Aston’s mass spectrograph and explain how isotopes are detected.
(OR)
Explain the theory of determining e/m of photo-electron using Lenard’s method.12. Explain the various quantum numbers associated with the vector atom model..
(OR)
Explain emission of D2 lines in sodium spectrum using term symbols and selection rules.13. State and derive Bragg’s law. Explain the working of Bragg spectrometer.
(OR)
Draw NaCl structure and discuss it.14. Explain how electrons are accelerated to very high energy by betatron.
(OR)
Write a note on thermo nuclear reactions15. Discuss the method of radio carbon dating.
(OR)
Explain latitude effect in cosmic rays.
Part – C (3 x 10 = 30)
Answer any three Questions
16. Explain Frank and Hertz Experiment to determine critical potential.
17. Describe Stern and Gerlach experiment and indicate the importance of the results obtained.
18. Describe the quantum treatment of normal Zeeman Effect.
19. Explain the construction and working of a GM counter.
20. Write an essay on the nuclear reactor
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